1. Field of the Invention
The present invention generally relates to a semiconductor device, a manufacturing method of the semiconductor device, and an electronic device. More specifically, the present invention relates to a semiconductor device including electronic parts, a reinforcing board having an electronic part accommodating portion for accommodating the electronic parts, and a multi-layered wiring structure electrically connected to the electronic parts, a manufacturing method of the semiconductor device, and an electronic device.
2. Description of the Related Art
An example of a semiconductor device is fabricated by directly connecting electrode pads of an electronic part to an interconnection pattern of a multi-layered wiring structure to reduce the size in the thickness direction of the semiconductor device. Another example of the semiconductor device is fabricated such that a reinforcing board on which an electronic part accommodating portion for accommodating electronic parts is installed is provided to reinforce the strength of the semiconductor device as illustrated in FIG. 1.
FIG. 1 is a cross-sectional view of the above example of the semiconductor device.
Referring to FIG. 1, the above example of the semiconductor device 200 includes a reinforcing board 201, an electronic part 202, a sealing resin 203, a multi-layered wiring structure 205 and external connection terminals 206.
The reinforcing board 201 has a multi-layered wiring structure forming face 201A on which the multi-layered wiring structure 205 is formed, and an electronic part accommodating portion 211 for accommodating the electronic part 202. The reinforcing board 201 is provided to secure the strength of the semiconductor device 200. The material of the reinforcing board 201 may be a metallic material.
The electronic part 202 has a thickness substantially the same as that of the reinforcing board 201. The electronic part 202 has an electrode pad forming face 202A and electrode pads 213 having bonding faces 213A. The electronic part 202 is accommodated in the electronic part accommodating portion 211 so that the electrode pad forming face 202A and the bonding face 213A are substantially even with the multi-layered wiring structure forming face 201A.
The sealing resin 203 is provided on the electronic part accommodating portion 211. With this, the sealing resin 203 seals a side of the electronic part 202. A lower face 203A of the sealing resin 203 is formed to be substantially even with the multi-layered wiring structure forming face 201A.
The multi-layered wiring structure 205 includes a laminated body 215, an interconnection pattern 216, and a solder resist layer 217. The laminated body 215 is formed by laminating the insulating layers 221 and 222. The insulating layer 221 is provided on the multi-layered wiring structure forming face 201A, the electrode pad forming face 202A, a bonding face 213A, and the lower face of the sealing resin 203. The insulating layer 222 is provided on a face of the insulating layer 221 opposite to a face in contact with the multi-layered wiring structure forming face 201A.
The interconnection pattern 216 is installed inside the laminated body 215. The interconnection pattern 216 includes a first bonding face 216A and a second bonding face 216B. The first bonding face 216A is exposed from the insulating layer 221, and is directly connected to the bonding face 213A of the electrode pad 213. The second bonding face 216B is exposed from the solder resist layer 217, and connected to an external connection terminal 206. With this, the interconnection pattern 216 electrically connects the electronic part 202 to the external connection terminal 206.
The solder resist layer 217 is formed on the face of the insulating layer 222 opposite to the face in contact with the insulating layer 221. The solder resist layer 217 includes opening portions 217A at which the second bonding faces 216B are exposed.
The external connection terminals 206 are connected to the bonding faces 216B. The external connection terminals 206 are terminals connected to a substrate, such as a mother board, on which the semiconductor device 200 is mounted.